Over the last two days, the PC industry was quite excited about Intel’s forthcoming high end discrete graphic chips, Larrabee, which are scheduled to launch some time in end of 2009 or early 2010. Larrabee is expected to compete head on with the GeForce and Radeon graphics chips from NVIDIA and AMD, respectively (Ref). Remarkably, Intel builds up its graphic chip capability solely through its in-house development effort without acquiring the know how through acquisitions of other graphics companies. In comparison, AMD has obtained its graphics chip capabilities through the acquisition of ATI in 2006.

Compared to NVIDIA’s GeForce and AMD’s Radeon which use proprietary graphics-focused cores, Larrabee will use the popular x86 cores with x86 instruction sets, much like a mulit-core CPU. However, Larrabee’s cores will be much simpler than the Core 2 Duo’s cores. It is being designed explicitly for stream processing and rasterized 3D graphics (DirectX/OpenGL) for games. It is also capable of performing ray tracing and physics processing in real time. Another interesting fact is that the design of Larrabee was coming from Intel’s previous Pentium 4 design team (Ref).

You may call Larrabee a GPU, or a mutli-core CPU or whatever. But the truth is the difference between GPU and CPU is now blurring.

According to NanoMarkets newest report “Thin Film Photovoltaics Markets: 2008 and Beyond”, thin-film photovoltaic (TFPV) market will grow from almost $2.4 billion ($US) in revenues in 2008 to over $12 billion in 2013. By 2015, NanoMarkets expects that TFPV will have a market opportunity of over $22 billion (Ref). The explosive growth is unfathomable a few years ago when TFPV was just a tiny niche area of photovoltaic’s business and was associated with low-margin products such as calculators. However, the advances of TFPV technology and the perennial shortage of crystalline silicon have driven TFPV technology to become the mainstream for PV market. In addition, TFPV technology shows great potential for low-cost, low-weight and flexible solar cells.

The current TFPV technology is still largely based on amorphous silicon (a-Si) which is well understood. However, non-silicon TFPV technologies, such as Copper Indium Gallium Deselenide (CIGS), cadmium telluride (CdTe), and GaAs etc, are gaining traction and may soon replace a-Si TFPV technology. In particular, GICS seems to offer all the virtues of TFPV with energy conversion efficiencies comparable to conventional PV of about 20 percent. One interesting development of CIGS TFPV technology is the possibility of building a flexible PV panel, such as CIGS on foil technology (Ref). A recent report from Lux Research claimed that TPFV build on flexible surfaces will make up 28 percent of the solar market by 2012 (Ref).

Below is a video on the manufacturing of solar panel from Q Cells:

The biggest semiconductor trade show in North America, SEMICON WEST 2008 has concluded couple of days ago (15-17 July). One of impending issues facing the semiconductor industry is the lithography solutions for 32nm and 22nm. It is pretty obvious now that EUV lithography will not be deployed for 32nm, and most likely will not be ready for 22nm as well. On the other hand, the immersion lithography technology which has served the semiconductor industry pretty well for 45-40nm will face its own limitations for 32nm and beyond. To bridge the gap for 32nm and 22nm before EUV lithography comes on board, the semiconductor industry is now betting on double patterning lithographic technology coupled with 193nm immersion lithography. However, as AMD Fellow Harry Levinson aptly summarized the current challenges of DP technology as “double patterning doubles the troubles” (Ref).

There are a number of variants for double patterning technology, such as double-exposure; trench double-patterning; line double-patterning; litho-etch-litho-etch, spacer and others. Whatever the variants, the biggest concerns with double-patterning technology are cost and overlay, particularly the overlay between the two exposures. To mitigate the overlay constraints, AMAT has introduced the Self-Aligned Double Patterning (SADP) Scheme. Samsung Electronics and Hynix Semiconductor Corp have announced they would use SADP for their 3x generation NAND flash. The IM Flash also reported that it would employ something similar to SADP for the 34nm memory devices (Ref).

During the SEMICON WEST 2008, IMEC announced a new variant of the double patterning technology which significantly reduces the cost. The new process first exposes the resist with the first pattern, apply a chemical enhancement to freeze that pattern into the material, expose the second pattern, and then develop and etch the resist normally. The big advantage of this approach is that the wafer stays on the litho track for both exposures. It doesn’t have to go off to a separate etch track and then back onto the litho track. (Ref)

On the other note, ASML has rolled out a new generation of 193-nm immersion scanner for double-patterning applications, Twinscan XT:1950i during the SEMICON WEST. It has an overlay below 4-nm and throughput of 175 wafers an hour. The system uses a lens with the same 1.35 numerical aperture (NA) as its predecessor, however the resolution has improved from 40 nm to 38 nm, which effectively provides a 10% gain in wafer area available for chips (Ref). You can watch a videos ads from ASML of this system below.

This morning, AMD also announced that Dirk Meyer will succeed Hector Ruiz as the company’s chief executive officer with immediate effect. Ruiz will become executive chairman of AMD and chair of the board of directors. His future role is on driving the company’s asset smart strategy to completion, and assisting with high-level government and strategic partner relations. The new CEO of AMD, Dirk Meyer, 46, joined AMD in 1995 and made his mark as part of the design team responsible for highly successful Athlon processors. In 2006, Meyer was appointed president and COO, and in 2007, he was elected to AMD’s board of directors. Prior to AMD, Meyer spent nearly a decade at Digital Equipment Corporation, where he was co-architect of the Alpha 21064 and 21264 microprocessors. Meyer graduated from the University of Illinois, where he received a bachelor’s degree in computer engineering. He also received a master’s degree in business administration from Boston University (Ref). He is the third CEO of AMD, after Hector Ruiz and Jerry Sander.

iPhone 3G was launched over the last weekend. Within 3 days, more than a million iPhone 3G have been sold (Ref). The iPhone 3G manic is simply amazing and Apple has demonstrated once again its unbeatable marketing prowess. Minutes after the launch, the Internet has published a couple of articles on the teardown analysis of iPhone 3G handset. Based on these articles, we list a summary of the components used by iPhone 3G over here (Ref1, Ref2, Ref3):

• ARM Processor: Samsung
• 3G Communication: Infineon (previously Broadcom)
• GPS: Infineon
• NAND: Toshiba (previously Samsung)
• Baseband NOR: Numonyx
• Audio Codec: Wolfson Microelectronics
• Power Amplifier: TriQuint
• Power Control: NXP
• Battery and USB: Linear Technology
• Touchscreen: Broadcom, NXP, TI
• Others: Skyworks

The clear winner is obviously Infineon which has four design wins in the iPhone 3G, including the 3G communication chip. Below is a two part teardown anaysis by Semiconductor Insight.

On the other hand, the world number one semiconductor equipment maker, Applied Material, has made one of its largest investment in Singapore. It broke ground for the construction of a new Singapore operations facility two days ago. The new 32,000 square meter operation facility in the Changi North Industrial Park will serve as a hub for Applied’s business activities throughout Asia. It is expected to be completed in late 2009. The building itself is solar-powered and capable of producing up to 350 kilowatts of energy or equivalent to powered 90 HDB homes (Ref). AMAT is also the first beneficiary of the newly launched Singpaore EDB’s Solar Capability Scheme (SCS). Applied already has a Singapore Building at the Changi Business Park and is expected to book nearly $1B in solar equipment orders this year (Ref). Below is an excellent marketing video from AMAT on solar manufacturing.

Few days ago, Toyota alleged that to meet the strong demand of hybrid cars, it will double the number of hybrid car output by early 2010s (Ref). Ironically, few years ago, people were still mocking at hybrid cars as something non-practical and non-cost effective. However, people are now embracing hybrid cars as a savior of world energy crisis. Who knows hybrid cars may one day become the mainstream if the oil price keeps increasing in the current rate.

Besides hybrid cars are riding on the current wave of energy crisis, the solar industry is also getting a big push from the recent spate of oil price hikes. Norway’s Renewable Energy Corp (REC) has recently announced it will invest close to 13 billion Norwegian crowns ($2.51 billion) in the first phase of a production complex in Singapore. The plant is scheduled to commence production in the first quarter 2010 and ramp-up from Q2’10 and Q4’10, and reach full capacity of 740 (megawatts) of wafers, 550 MW of cells and 590 MW of modules before 2012 (Ref). Singapore is almost certain to become the world’s largest production of solar wafers, thanks to the soaring oil price.

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I have captured some of the highlights of 2008 Symposium on VLSI Technology here:

• Continuously driving incremental performance improvement in planar CMOS transistor performance is always one of the themes in VLSI Technology Symposium. This year, a number of companies have reported such efforts. For example, Toshiba reported that F and N co-implant at the halo implantation help could help to reduce the external resistance and improve NFET drive current. For pFET, Toshiba and IBM jointly announced a new Twisted Direct Silicon Bonding Technology to achieve higher hole mobility (Ref).
• AMAT and TSMC reported a novel low-K spacer technology featuring CVD-SiBCN material with low dielectric constant of 5.2 and film stress of 430MPa to boost AC and DC CMOS performance.
• The decade-old W contact technology is approaching its life limit. As the contact hole gets smaller, contact resistance is increasing, partly due to the contact barrier material. Various W replacements have been sought after. Among them Cu is the most desirable since wealth of knowledge on Cu technology has been built up over the last decade. This year, NEC reported a Direct Low-K/Cu Dual Damascene Contact Lines technology that can significantly improved the RO improved by approximately 7%.
• Intel divulged more details on its Nehalem chip and 45nm high-k/metal-gate technology. Intel claimed that stress enhancement due to “gate last” increases the stress benefit of eSiGe.The amount of Ge in the eSiGe has also increased from 22% in 65nm tech to 30% in 45nm technology. In addition, Intel also employs trench contact in NMOS to compensate for the loss of tensile strain from the absence of Tensile stress layer. The trench contact also has an added benefit of lowering the contact resistance by >50%. Another notably piece of work by Intel is the Floating Body Cell (FBC) for cache memory. The FBC technology could potentially be introduced at the 16 nm node and further scaled to the 10 nm technology generation (Ref). All together, Intel contributed 5 papers to this year Symposium.

The opening of Siltronic Samsung Wafer is another major milestone for Singapore semiconductor industry which consists of 14 wafer fabrication plants including the world’s top three wafer foundry companies (TSMC, UMC and Chartered) , 19 chip test and assembly plants, and about 40 design centers. The Singapore Semiconductor Industry contributes about 10% global market share of semiconductor wafer foundry output. It is currently employing ~34,000 people and accounting almost 30 percent of the electronics and engineering section in Singapore. One of the biggest challenges for the Singapore Semiconductor Industry is to source for enough talents to support the ecosystem of this industry. This is not going to be easy as new emerging industries in Singapore, such as Solar industry and Renewable Energy Industry, are draining away talents from the Semiconductor Industry. In addition, semiconductor industry is considered a mature industry and young engineering graduates would prefer new emerging industries which offer more opportunities.

Below is a video clip on Singapore SEMICON 2008 held last month.

First, AMD is about to launch the world’s highest performing graphics processor, codenamed RV770, this summer (Ref). The chip has teraflop computing power that is more powerful than any video game console known today. It is claimed to produce amazing cinematic 2.0 visual effects. Second, Nvidia has announced a new family of GeForce GTX 200 graphics processors that are capable of delivering fifty percent more gaming performance over its previous GeForce 8800 Ultra GPU through a whopping 240 enhanced processor cores that can generate resolutions as high as 2560 x 1600 (Ref). Being a embarrassing number 3 in discrete graphics chip market, Intel announced that it is going to fundamentally change its graphic architecture from raster-graphics based to ray-tracing based design which will greatly boost the graphics experience in the future (Ref). Yes, the era of virtual reality is coming soon.