Jan
21
MacBook Air uses 65nm CPU and 45nm packaging hybrid
Filed Under Microprocessor, Packaging and Testing, Video Gallery | 1 Comment
Last week, Steve Jobs stunned the world by launching a superslim notebook, MacBook Air (watch the video below). Immediately after the launch, AnandTech founder Anand Lal Shimpi unveiled the CPU and packaging used in the Apple’s Macbook Air (Ref). I was a little surprised to learn that the Macbook Air is using the Intel’s 65nm 1.6GHz and 1.8GHz Merom based Core 2 Duo with a 4MB L2 cache and Intel 965GMS chipset with integrated graphics. Unlike Apple’s usual style, the MacBook Air is not adopting the latest CPUs in the market - Intel’s 45nm high-k/metal-gate Penryn chips which seem a nice fit to such a slim device. In contrast, several other PC makers were already showing off their 45nm based notebooks at CES two weeks ago.
What is even more interesting is the fact that the 65nm CPU is force fitted into an extra-small chip package supposedly to be used for the Montevina SFF Centrino platform and 45nm mobile Penryn due to be launched in the second half of 2008. The new chip package is 60% smaller then the standard package (see pictures from Anantech). I guess only Apple has the muscle to flex in order to get Intel to specially tailored such a unique hybrid of 65nm chip on 45nm package.
The hybrid of 65nm CPU and 45nm package creates an unusual blend of performance characteristics. It is just above the Low Voltage (LV series) variants in terms of clock speed and power use but considerably more efficient than the regular mobile processor, which consumes 35 watts of peak power at a minimum 1.8GHz (Ref).
The question is why Apple took such a huge trouble to tailor made a hybrid part when the 45nm Penryn chips were available 3 weeks before the launch of the MacBook Air? George Ou from Zdnet suggested it could be because during the design phase of the MacBook Air, Apple was worried that the 45nm mobile Penryn chips might not be ready in time for the launch of MacBook Air at the MacWorld. To be on the safe bet, therefore Apple opted for the hybrid design instead (Ref).
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Oct
22
Lead-free copper pillar bump technology entering into mainstream
Filed Under Packaging and Testing, Video Gallery | 1 Comment
I attended our AMD internal Tech Forum on last Friday. I was very impressed by the high technical level of the topics. The scope of the topics was wide ranging, including packaging, testing, power efficiency, and test floor automation. Particularly, I was impressed by the presentation on copper pillar bump technology. While the conventional C4 bump packaging technology is still the mainstream in the semiconductor industry, I believe most chip makers would progressively adopt the copper pillar bump (CPB) packaging technology. This is because as the pin count and connection density of ICs increases, the pitch between connection pins is necessarily getting smaller. As a result, the spherical C4 bump will inevitably run into its technology limitation. In contrast, the copper pillar bump technology not only offers significantly smaller pitch, it has other advantages over the C4 bump technology, such as improved thermal and electrical performance, better electromigration reliability and most importantly it could be Pb-free by using a reflowable Pb-free (Sn/Ag) solder process. Conventional C4 bump process generally uses Pb-Sn soldering. Most of the major IC packaging foundries have already offered the copper pillar process (Ref).
Intel is definitely the forerunner in packaging technology. As early as the beginning of 2006, Intel has already employed copper pillar bumps for flip-chip attachment of its 65nm Yonah and Presler processors (Ref).
The chip giant is the first chip maker to utilize this technique. The reason why they started using it is to cut the amount of lead uses in the products, to help meet the Reduction of Hazardous Substances (RoHS) legislation in Europe and elsewhere. Recently, Intel made an announcement that its future processors, beginning with its entire family of 45nm, high-k and metal gate devices, are going 100-percent Pb-free (Ref).
About one week ago, Nextreme announced a significant breakthrough in IC chip cooling using a novel copper pillar bump technology (Ref). Below is a video clip on this amazing breakthrough.


